The present invention relates to a voltage follower circuit.
A voltage follower circuit as shown in FIG. 1 is known. See FIG. 1 of U.S. Pat. No. 4,223,276, for example. However, this prior art circuit has a drawback that oscillation is liable to occur. In FIG. 2 of the above patent another voltage follower circuit is disclosed which includes a Miller capacitor for phase correction for the purpose of preventing oscillation. In this circuit, the frequency response is degraded and the adaptability for integrated circuits is impaired due to incorporation of the capacitor. In FIG. 3 of the above patent still another voltage follower circuit is disclosed which is arranged to reduce the open-loop gain by making the mutual conductance small for the purpose of preventing oscillation. Although this circuit's prevention of oscillation is improved, it presents a new problem of an increase in the offset voltage and hence of an increase in the output error.